State retention power gating (SRPG) is a technique for managing power in electronic devices. SRPG allows to gate supply power and thereby save leakage power. The logic state of a module may be saved before the module is powered off. When the module is powered on again, the saved state may be restored.
The state of a module may be the logic state of a set of stateful elements. The stateful elements may, for example, be registers or flip-flops. Several stateful elements may be connected in series to form a scan chain. When the module to about to be powered off, the individual states of the stateful elements of the scan chain may be shifted through the scan chain and into a memory unit where they may be stored while the module is powered off.
A module may comprise more than only one scan chain. The scan chains may have the same lengths. This can be advantageous because it allows the scan chains to be operated in a synchronized manner. For various reasons, however, the scan chains in an electronic device may have different lengths. For example, one or more scan chains may be shorter than the others. In this case, dummy clock cycles or dummy stateful elements may be introduced in order to operate the scan chains in parallel. Dummy cycles may, however, complicate the clock tree design, whereas adding dummy stateful elements may cost area on a chip.